• Review and analyze Foundry design rules and design kit (FDK) along with implementing FDK in design environment of the company. • Make technical support/collaboration for/with internal IC designers. • Work with IC/CAD teams to generate an advanced strategy to implement design environment for RF/analog/digital IC design in sub-100nm technology. • Design and layout test structures for device characterization/modeling and process control monitors. • Test/measurement system set-up for DC/CV/RF measurements for device modeling & characterization. • Device characterization and modeling including, but not limited to; - Test/measurement system calibration and RF de-embedding, - Data acquisition and selection (filtering) for device characterization & modeling, - Device model generation including process corner and statistical models, and - Device layout/architecture optimization. • Device model implementation & verification.
Requirements:
• In-depth understanding on device physics of MOSFETs, BJTs, MOS/junction varactors, and passive devices (L, C, and R) in sub-100nm technology. • In-depth understanding on BSIM3/4, PSP, GP models and RF passive device models. • Wide knowledge of sub-100nm CMOS technologies. Direct experience in process integration is a strong plus. • Fundamental understanding on IC package technology. • Direct experience in design of modeling test chip including RF calibration structures. • Direct experience in characterization and modeling of semiconductor devices at low and high (RF or microwave) frequencies. • Experience of IC-CAP and/or Cadence design tools (Spectre, Virtuoso, etc) is a plus.
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